GCC Code Coverage Report

Directory: main/
File: adapter/wired/pce.c
Date: 2025-10-04 14:03:00
Exec Total Coverage
Lines: 0 122 0.0%
Functions: 0 8 0.0%
Branches: 0 60 0.0%
Line Branch Exec Source
1 /*
2 * Copyright (c) 2021-2025, Jacques Gagnon
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6 #include <string.h>
7 #include "adapter/config.h"
8 #include "adapter/wired/wired.h"
9 #include "system/manager.h"
10 #include "zephyr/types.h"
11 #include "tools/util.h"
12 #include "tests/cmds.h"
13 #include "bluetooth/mon.h"
14 #include "pce.h"
15 #include "driver/gpio.h"
16
17 #define P1_SEL_PIN 33
18 #define P1_OE_PIN 26
19 #define P1_U_I_PIN 3
20 #define P1_R_II_PIN 5
21 #define P1_D_SL_PIN 18
22 #define P1_L_RN_PIN 23
23
24 #define P1_SEL_MASK (1 << (P1_SEL_PIN - 32))
25 #define P1_OE_MASK (1 << P1_OE_PIN)
26 #define P1_U_I_MASK (1 << P1_U_I_PIN)
27 #define P1_R_II_MASK (1 << P1_R_II_PIN)
28 #define P1_D_SL_MASK (1 << P1_D_SL_PIN)
29 #define P1_L_RN_MASK (1 << P1_L_RN_PIN)
30
31 #define P1_III_MASK P1_U_I_MASK
32 #define P1_IV_MASK P1_R_II_MASK
33 #define P1_V_MASK P1_D_SL_MASK
34 #define P1_VI_MASK P1_L_RN_MASK
35
36 #define P1_OUT0_MASK (BIT(P1_U_I_PIN) | BIT(P1_R_II_PIN) | BIT(P1_D_SL_PIN) | BIT(P1_L_RN_PIN))
37
38 #define PCE_OUT_DISABLE ~P1_OUT0_MASK
39
40 enum {
41 PCE_B = 0,
42 PCE_C,
43 PCE_A,
44 PCE_START,
45 PCE_LD_UP,
46 PCE_LD_DOWN,
47 PCE_LD_LEFT,
48 PCE_LD_RIGHT,
49 PCE_Z = 12,
50 PCE_Y,
51 PCE_X,
52 PCE_MODE,
53 };
54
55 static DRAM_ATTR const uint8_t pce_mouse_axes_idx[ADAPTER_MAX_AXES] =
56 {
57 /* AXIS_LX, AXIS_LY, AXIS_RX, AXIS_RY, TRIG_L, TRIG_R */
58 0, 1, 0, 1, 0, 1
59 };
60
61 static DRAM_ATTR const struct ctrl_meta pce_mouse_axes_meta[ADAPTER_MAX_AXES] =
62 {
63 {.size_min = -128, .size_max = 127, .neutral = 0x00, .abs_max = 127, .abs_min = 128, .polarity = 1},
64 {.size_min = -128, .size_max = 127, .neutral = 0x00, .abs_max = 127, .abs_min = 128},
65 {.size_min = -128, .size_max = 127, .neutral = 0x00, .abs_max = 127, .abs_min = 128, .polarity = 1},
66 {.size_min = -128, .size_max = 127, .neutral = 0x00, .abs_max = 127, .abs_min = 128},
67 {.size_min = -128, .size_max = 127, .neutral = 0x00, .abs_max = 127, .abs_min = 128},
68 {.size_min = -128, .size_max = 127, .neutral = 0x00, .abs_max = 127, .abs_min = 128},
69 };
70
71 struct pce_map {
72 uint32_t buttons[5];
73 } __packed;
74
75 struct pce_mouse_map {
76 int32_t raw_axes[2];
77 uint32_t buttons;
78 uint8_t relative[2];
79 } __packed;
80
81 struct pce_kb_map {
82 uint32_t scancodes[18][2];
83 } __packed;
84
85 struct pce_kb_key_to_matrix {
86 uint8_t idx;
87 uint8_t nibble_idx;
88 uint32_t mask;
89 };
90
91 static const uint32_t pce_mouse_mask[4] = {0x190100F0, 0x00000000, 0x00000000, BR_COMBO_MASK};
92 static const uint32_t pce_mouse_desc[4] = {0x000000F0, 0x00000000, 0x00000000, 0x00000000};
93 static const uint32_t pce_mouse_btns_mask[32] = {
94 0, 0, 0, 0,
95 0, 0, 0, 0,
96 0, 0, 0, 0,
97 0, 0, 0, 0,
98 P1_D_SL_MASK, 0, 0, 0,
99 0, 0, 0, 0,
100 P1_U_I_MASK, 0, 0, P1_L_RN_MASK,
101 P1_R_II_MASK, 0, 0, 0,
102 };
103
104 static const uint32_t pce_mask[4] = {0x00750F00, 0x00000000, 0x00000000, BR_COMBO_MASK};
105 static const uint32_t pce_desc[4] = {0x00000000, 0x00000000, 0x00000000, 0x00000000};
106 static DRAM_ATTR const uint32_t pce_btns_mask[][32] = {
107 /* URDL */
108 {
109 0, 0, 0, 0,
110 0, 0, 0, 0,
111 P1_L_RN_MASK, P1_R_II_MASK, P1_D_SL_MASK, P1_U_I_MASK,
112 0, 0, 0, 0,
113 0, 0, 0, 0,
114 0, 0, 0, 0,
115 0, 0, 0, 0,
116 0, 0, 0, 0,
117 },
118 /* 12SR */
119 {
120 0, 0, 0, 0,
121 0, 0, 0, 0,
122 0, 0, 0, 0,
123 0, 0, 0, 0,
124 P1_R_II_MASK, 0, P1_U_I_MASK, 0,
125 P1_L_RN_MASK, P1_D_SL_MASK, 0, 0,
126 0, 0, 0, 0,
127 0, 0, 0, 0,
128 },
129 /* 3456 */
130 {
131 0, 0, 0, 0,
132 0, 0, 0, 0,
133 0, 0, 0, 0,
134 0, 0, 0, 0,
135 0, 0, 0, 0,
136 0, 0, 0, 0,
137 0, 0, 0, 0,
138 0, 0, 0, 0,
139 },
140 };
141
142 static const uint32_t pce_6btns_mask[4] = {0x337F0F00, 0x00000000, 0x00000000, BR_COMBO_MASK};
143 static const uint32_t pce_6btns_desc[4] = {0x00000000, 0x00000000, 0x00000000, 0x00000000};
144 static DRAM_ATTR const uint32_t pce_6btns_btns_mask[][32] = {
145 /* URDL */
146 {
147 0, 0, 0, 0,
148 0, 0, 0, 0,
149 P1_L_RN_MASK, P1_R_II_MASK, P1_D_SL_MASK, P1_U_I_MASK,
150 0, 0, 0, 0,
151 0, 0, 0, 0,
152 0, 0, 0, 0,
153 0, 0, 0, 0,
154 0, 0, 0, 0,
155 },
156 /* 12SR */
157 {
158 0, 0, 0, 0,
159 0, 0, 0, 0,
160 0, 0, 0, 0,
161 0, 0, 0, 0,
162 0, P1_U_I_MASK, P1_R_II_MASK, 0,
163 P1_L_RN_MASK, P1_D_SL_MASK, 0, 0,
164 0, 0, 0, 0,
165 0, 0, 0, 0,
166 },
167 /* 3456 */
168 {
169 0, 0, 0, 0,
170 0, 0, 0, 0,
171 0, 0, 0, 0,
172 0, 0, 0, 0,
173 P1_III_MASK, 0, 0, P1_V_MASK,
174 0, 0, 0, 0,
175 P1_IV_MASK, P1_IV_MASK, 0, 0,
176 P1_VI_MASK, P1_VI_MASK, 0, 0,
177 },
178 };
179
180 static const uint32_t pce_kb_mask[4] = {0xE6FF0F0F, 0xFFFFFFFF, 0xFFFFFFFF, 0x0007FFFF | BR_COMBO_MASK};
181 static const uint32_t pce_kb_desc[4] = {0x00000000, 0x00000000, 0x00000000, 0x00000000};
182 static const struct pce_kb_key_to_matrix pce_kb_key_to_matrix[KBM_MAX] = {
183 /* KB_A, KB_D, KB_S, KB_W, MOUSE_X_LEFT, MOUSE_X_RIGHT, MOUSE_Y_DOWN MOUSE_Y_UP */
184 {3, 0, P1_R_II_MASK}, {3, 1, P1_U_I_MASK}, {5, 0, P1_L_RN_MASK}, {14, 1, P1_D_SL_MASK}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0},
185 /* KB_LEFT, KB_RIGHT, KB_DOWN, KB_UP, MOUSE_WX_LEFT, MOUSE_WX_RIGHT, MOUSE_WY_DOWN, MOUSE_WY_UP */
186 {11, 0, P1_D_SL_MASK}, {9, 0, P1_D_SL_MASK}, {11, 0, P1_R_II_MASK}, {9, 0, P1_R_II_MASK}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0},
187 /* KB_Q, KB_R, KB_E, KB_F, KB_ESC, KB_ENTER, KB_LWIN, KB_HASH */
188 {5, 0, P1_R_II_MASK}, {5, 0, P1_D_SL_MASK}, {3, 1, P1_R_II_MASK}, {3, 1, P1_D_SL_MASK}, {15, 1, P1_D_SL_MASK}, {15, 0, P1_U_I_MASK}, {9, 1, P1_R_II_MASK}, {0, 0, 0},
189 /* MOUSE_RIGHT, KB_Z, KB_LCTRL, MOUSE_MIDDLE, MOUSE_LEFT, KB_X, KB_LSHIFT, KB_SPACE */
190 {0, 0, 0}, {6, 0, P1_D_SL_MASK}, {14, 1, P1_U_I_MASK}, {0, 0, 0}, {0, 0, 0}, {6, 0, P1_U_I_MASK}, {15, 0, P1_D_SL_MASK}, {10, 1, P1_D_SL_MASK},
191
192 /* KB_B, KB_C, KB_G, KB_H, KB_I, KB_J, KB_K, KB_L */
193 {3, 0, P1_D_SL_MASK}, {3, 0, P1_L_RN_MASK}, {12, 1, P1_D_SL_MASK}, {4, 0, P1_U_I_MASK}, {4, 0, P1_R_II_MASK}, {4, 0, P1_D_SL_MASK}, {4, 0, P1_L_RN_MASK}, {4, 1, P1_U_I_MASK},
194 /* KB_M, KB_N, KB_O, KB_P, KB_T, KB_U, KB_V, KB_Y */
195 {4, 1, P1_R_II_MASK}, {4, 1, P1_D_SL_MASK}, {12, 1, P1_U_I_MASK}, {5, 0, P1_U_I_MASK}, {5, 1, P1_U_I_MASK}, {5, 1, P1_R_II_MASK}, {5, 1, P1_D_SL_MASK}, {6, 0, P1_R_II_MASK},
196 /* KB_1, KB_2, KB_3, KB_4, KB_5, KB_6, KB_7, KB_8 */
197 {7, 0, P1_R_II_MASK}, {7, 0, P1_D_SL_MASK}, {7, 0, P1_L_RN_MASK}, {7, 1, P1_U_I_MASK}, {7, 1, P1_R_II_MASK}, {7, 1, P1_D_SL_MASK}, {16, 1, P1_D_SL_MASK}, {8, 0, P1_U_I_MASK},
198 /* KB_9, KB_0, KB_BACKSPACE, KB_TAB, KB_MINUS, KB_EQUAL, KB_LEFTBRACE, KB_RIGHTBRACE */
199 {8, 0, P1_R_II_MASK}, {7, 0, P1_U_I_MASK}, {13, 1, P1_R_II_MASK}, {11, 0, P1_U_I_MASK}, {16, 1, P1_R_II_MASK}, {6, 1, P1_D_SL_MASK}, {6, 0, P1_L_RN_MASK}, {6, 1, P1_R_II_MASK},
200
201 /* KB_BACKSLASH, KB_SEMICOLON, KB_APOSTROPHE, KB_GRAVE, KB_COMMA, KB_DOT, KB_SLASH, KB_CAPSLOCK */
202 {12, 1, P1_R_II_MASK}, {8, 0, P1_L_RN_MASK}, {8, 0, P1_D_SL_MASK}, {6, 1, P1_U_I_MASK}, {8, 1, P1_U_I_MASK}, {8, 1, P1_R_II_MASK}, {8, 1, P1_D_SL_MASK}, {15, 1, P1_U_I_MASK},
203 /* KB_F1, KB_F2, KB_F3, KB_F4, KB_F5, KB_F6, KB_F7, KB_F8 */
204 {10, 0, P1_R_II_MASK}, {10, 0, P1_D_SL_MASK}, {10, 0, P1_L_RN_MASK}, {10, 1, P1_U_I_MASK}, {10, 1, P1_R_II_MASK}, {13, 0, P1_U_I_MASK}, {13, 0, P1_R_II_MASK}, {13, 0, P1_D_SL_MASK},
205 /* KB_F9, KB_F10, KB_F11, KB_F12, KB_PSCREEN, KB_SCROLL, KB_PAUSE, KB_INSERT */
206 {13, 0, P1_L_RN_MASK}, {13, 1, P1_U_I_MASK}, {2, 1, P1_R_II_MASK}, {2, 1, P1_U_I_MASK}, {11, 0, P1_L_RN_MASK}, {14, 0, P1_R_II_MASK}, {14, 0, P1_U_I_MASK}, {13, 1, P1_D_SL_MASK},
207 /* KB_HOME, KB_PAGEUP, KB_DEL, KB_END, KB_PAGEDOWN, KB_NUMLOCK, KB_KP_DIV, KB_KP_MULTI */
208 {11, 1, P1_U_I_MASK}, {12, 0, P1_R_II_MASK}, {15, 1, P1_R_II_MASK}, {10, 0, P1_U_I_MASK}, {12, 0, P1_U_I_MASK}, {9, 0, P1_U_I_MASK}, {11, 1, P1_D_SL_MASK}, {2, 0, P1_D_SL_MASK},
209
210 /* KB_KP_MINUS, KB_KP_PLUS, KB_KP_ENTER, KB_KP_1, KB_KP_2, KB_KP_3, KB_KP_4, KB_KP_5 */
211 {11, 1, P1_R_II_MASK}, {2, 0, P1_L_RN_MASK}, {15, 0, P1_R_II_MASK}, {1, 0, P1_R_II_MASK}, {1, 0, P1_D_SL_MASK}, {1, 0, P1_L_RN_MASK}, {1, 1, P1_U_I_MASK}, {1, 1, P1_R_II_MASK},
212 /* KB_KP_6, KB_KP_7, KB_KP_8, KB_KP_9, KB_KP_0, KB_KP_DOT, KB_LALT, KB_RCTRL */
213 {1, 1, P1_D_SL_MASK}, {14, 1, P1_R_II_MASK}, {2, 0, P1_U_I_MASK}, {2, 0, P1_R_II_MASK}, {1, 0, P1_U_I_MASK}, {2, 1, P1_D_SL_MASK}, {9, 1, P1_U_I_MASK}, {14, 0, P1_L_RN_MASK},
214 /* KB_RSHIFT, KB_RALT, KB_RWIN */
215 {15, 0, P1_L_RN_MASK}, {3, 0, P1_U_I_MASK}, {14, 0, P1_D_SL_MASK},
216 };
217
218 ✗ static void pce_ctrl_special_action(struct wired_ctrl *ctrl_data, struct wired_data *wired_data) {
219 /* Output config mode toggle GamePad/GamePadAlt */
220 ✗ if (ctrl_data->map_mask[0] & generic_btns_mask[PAD_MT]) {
221 ✗ if (ctrl_data->btns[0].value & generic_btns_mask[PAD_MT]) {
222 ✗ if (!atomic_test_bit(&wired_data->flags, WIRED_WAITING_FOR_RELEASE)) {
223 ✗ atomic_set_bit(&wired_data->flags, WIRED_WAITING_FOR_RELEASE);
224 }
225 }
226 else {
227 ✗ if (atomic_test_bit(&wired_data->flags, WIRED_WAITING_FOR_RELEASE)) {
228 ✗ atomic_clear_bit(&wired_data->flags, WIRED_WAITING_FOR_RELEASE);
229
230 ✗ config.out_cfg[ctrl_data->index].dev_mode &= 0x01;
231 ✗ config.out_cfg[ctrl_data->index].dev_mode ^= 0x01;
232 ✗ sys_mgr_cmd(SYS_MGR_CMD_WIRED_RST);
233 }
234 }
235 }
236 ✗ }
237
238 ✗ static void pce_mouse_from_generic(struct wired_ctrl *ctrl_data, struct wired_data *wired_data) {
239 ✗ struct pce_mouse_map map_tmp;
240 ✗ int32_t *raw_axes = (int32_t *)(wired_data->output);
241
242 ✗ memcpy((void *)&map_tmp, wired_data->output, sizeof(map_tmp));
243
244 ✗ for (uint32_t i = 0; i < ARRAY_SIZE(generic_btns_mask); i++) {
245 ✗ if (ctrl_data->map_mask[0] & BIT(i)) {
246 ✗ if (ctrl_data->btns[0].value & generic_btns_mask[i]) {
247 ✗ map_tmp.buttons &= ~pce_mouse_btns_mask[i];
248 }
249 else {
250 ✗ map_tmp.buttons |= pce_mouse_btns_mask[i];
251 }
252 }
253 }
254
255 ✗ for (uint32_t i = 2; i < 4; i++) {
256 ✗ if (ctrl_data->map_mask[0] & (axis_to_btn_mask(i) & pce_mouse_desc[0])) {
257 ✗ if (ctrl_data->axes[i].relative) {
258 ✗ map_tmp.relative[pce_mouse_axes_idx[i]] = 1;
259 ✗ atomic_add(&raw_axes[pce_mouse_axes_idx[i]], ctrl_data->axes[i].value);
260 }
261 else {
262 ✗ map_tmp.relative[pce_mouse_axes_idx[i]] = 0;
263 ✗ raw_axes[pce_mouse_axes_idx[i]] = ctrl_data->axes[i].value;
264 }
265 }
266 }
267
268 ✗ memcpy(wired_data->output + 8, (uint8_t *)&map_tmp + 8, sizeof(map_tmp) - 8);
269 ✗ }
270
271 ✗ static void pce_kb_from_generic(struct wired_ctrl *ctrl_data, struct wired_data *wired_data) {
272 ✗ struct pce_kb_map map_tmp;
273
274 ✗ memset(&map_tmp, 0xFF, sizeof(map_tmp));
275
276 ✗ for (uint32_t i = 0; i < KBM_MAX; i++) {
277 ✗ if (ctrl_data->map_mask[i / 32] & BIT(i & 0x1F)) {
278 ✗ if (ctrl_data->btns[i / 32].value & BIT(i & 0x1F)) {
279 ✗ uint8_t byte = pce_kb_key_to_matrix[i].idx;
280 ✗ uint8_t nibble = pce_kb_key_to_matrix[i].nibble_idx;
281
282 ✗ map_tmp.scancodes[byte][nibble] &= ~pce_kb_key_to_matrix[i].mask;
283 }
284 }
285 }
286
287 ✗ memcpy(wired_data->output, (void *)&map_tmp, sizeof(map_tmp));
288 ✗ }
289
290 ✗ static void pce_ctrl_from_generic(struct wired_ctrl *ctrl_data, struct wired_data *wired_data) {
291 ✗ struct pce_map map_tmp;
292 ✗ uint32_t map_mask[3];
293 ✗ const uint32_t (*btns_mask)[32] = (config.out_cfg[0].dev_mode == DEV_PAD_ALT) ? pce_6btns_btns_mask : pce_btns_mask;
294
295 ✗ memset(map_mask, 0xFF, sizeof(map_mask));
296 ✗ memcpy((void *)&map_tmp, wired_data->output, sizeof(map_tmp));
297
298 ✗ for (uint32_t i = 0; i < ARRAY_SIZE(generic_btns_mask); i++) {
299 ✗ if (ctrl_data->map_mask[0] & BIT(i)) {
300 ✗ if (ctrl_data->btns[0].value & generic_btns_mask[i]) {
301 ✗ for (uint32_t j = 0; j < 3; j++) {
302 ✗ map_tmp.buttons[j] &= ~btns_mask[j][i];
303 ✗ map_mask[j] &= ~btns_mask[j][i];
304 }
305 ✗ wired_data->cnt_mask[i] = ctrl_data->btns[0].cnt_mask[i];
306 }
307 else {
308 ✗ for (uint32_t j = 0; j < 3; j++) {
309 ✗ if (map_mask[j] & btns_mask[j][i]) {
310 ✗ map_tmp.buttons[j] |= btns_mask[j][i];
311 }
312 }
313 ✗ wired_data->cnt_mask[i] = 0;
314 }
315 }
316 }
317
318 ✗ pce_ctrl_special_action(ctrl_data, wired_data);
319
320 ✗ memcpy(wired_data->output, (void *)&map_tmp, sizeof(map_tmp));
321
322 ✗ TESTS_CMDS_LOG("\"wired_output\": {\"btns\": [%ld, %ld, %ld, %ld, %ld]},\n",
323 map_tmp.buttons[0], map_tmp.buttons[1], map_tmp.buttons[2], map_tmp.buttons[3], map_tmp.buttons[4]);
324 BT_MON_LOG("\"wired_output\": {\"btns\": [%08lX, %08lX, %08lX, %08lX, %08lX]},\n",
325 ✗ map_tmp.buttons[0], map_tmp.buttons[1], map_tmp.buttons[2], map_tmp.buttons[3], map_tmp.buttons[4]);
326 ✗ }
327
328 ✗ void IRAM_ATTR pce_init_buffer(int32_t dev_mode, struct wired_data *wired_data) {
329 ✗ switch (dev_mode) {
330 ✗ case DEV_KB:
331 {
332 ✗ struct pce_kb_map *map = (struct pce_kb_map *)wired_data->output;
333
334 ✗ memset(wired_data->output, 0xFF, sizeof(struct pce_kb_map));
335 ✗ map->scancodes[0][0] = P1_R_II_MASK;
336 ✗ map->scancodes[0][1] = PCE_OUT_DISABLE;
337 ✗ map->scancodes[17][0] = P1_R_II_MASK;
338 ✗ map->scancodes[17][1] = PCE_OUT_DISABLE;
339 ✗ break;
340 }
341 ✗ case DEV_MOUSE:
342 {
343 ✗ struct pce_mouse_map *map = (struct pce_mouse_map *)wired_data->output;
344
345 ✗ map->buttons = 0xFFFDFFFD;
346 ✗ for (uint32_t i = 0; i < 2; i++) {
347 ✗ map->raw_axes[i] = 0;
348 ✗ map->relative[i] = 1;
349 }
350 break;
351 }
352 default:
353 {
354 struct pce_map *map = (struct pce_map *)wired_data->output;
355 struct pce_map *map_mask = (struct pce_map *)wired_data->output_mask;
356
357 ✗ for (uint32_t i = 0; i < 3; i++) {
358 ✗ map->buttons[i] = 0xFFFDFFFD;
359 ✗ map_mask->buttons[i] = 0x00000000;
360 }
361 break;
362 }
363 }
364 ✗ }
365
366 ✗ void pce_meta_init(struct wired_ctrl *ctrl_data) {
367 ✗ memset((void *)ctrl_data, 0, sizeof(*ctrl_data)*WIRED_MAX_DEV);
368
369 ✗ for (uint32_t i = 0; i < WIRED_MAX_DEV; i++) {
370 ✗ for (uint32_t j = 0; j < ADAPTER_MAX_AXES; j++) {
371 ✗ switch (config.out_cfg[0].dev_mode) {
372 ✗ case DEV_KB:
373 ✗ ctrl_data[i].mask = pce_kb_mask;
374 ✗ ctrl_data[i].desc = pce_kb_desc;
375 ✗ break;
376 ✗ case DEV_MOUSE:
377 ✗ ctrl_data[i].mask = pce_mouse_mask;
378 ✗ ctrl_data[i].desc = pce_mouse_desc;
379 ✗ ctrl_data[i].axes[j].meta = &pce_mouse_axes_meta[j];
380 ✗ break;
381 ✗ case DEV_PAD_ALT:
382 ✗ ctrl_data[i].mask = pce_6btns_mask;
383 ✗ ctrl_data[i].desc = pce_6btns_desc;
384 ✗ break;
385 ✗ default:
386 ✗ ctrl_data[i].mask = pce_mask;
387 ✗ ctrl_data[i].desc = pce_desc;
388 }
389 }
390 }
391 ✗ }
392
393 ✗ void pce_from_generic(int32_t dev_mode, struct wired_ctrl *ctrl_data, struct wired_data *wired_data) {
394 ✗ switch (dev_mode) {
395 ✗ case DEV_KB:
396 ✗ pce_kb_from_generic(ctrl_data, wired_data);
397 ✗ break;
398 ✗ case DEV_MOUSE:
399 ✗ pce_mouse_from_generic(ctrl_data, wired_data);
400 ✗ break;
401 ✗ default:
402 ✗ pce_ctrl_from_generic(ctrl_data, wired_data);
403 ✗ break;
404 }
405 ✗ }
406
407 ✗ void IRAM_ATTR pce_gen_turbo_mask(struct wired_data *wired_data) {
408 ✗ const uint32_t (*btns_mask)[32] = (config.out_cfg[0].dev_mode == DEV_PAD_ALT) ? pce_6btns_btns_mask : pce_btns_mask;
409 ✗ struct pce_map *map_mask = (struct pce_map *)wired_data->output_mask;
410
411 ✗ memset(map_mask, 0, sizeof(*map_mask));
412
413 ✗ wired_gen_turbo_mask_btns32(wired_data, map_mask->buttons, btns_mask, 3);
414 ✗ }
415